The brief

Analyst view

• 2026 capital spending raised twice, to a record $10.5B, mostly for AI packaging and test.
• Leading-edge packaging revenue was $1.6B in 2025; the 2027 target is at least $7.5B.
• TSMC now outsources parts of its CoWoS process to ASE and SPIL to ease the AI packaging crunch.

Technical approach

As reported

Packaging

Assembly and test at huge scale

ASE is the largest outsourced packaging and test company, running plants across Taiwan, China, Korea, Japan and Southeast Asia.

2.5D

CoWoS-style work for AI chips

AI chips sit beside stacked memory on a silicon base. ASE bonds these bases to the package substrate, and now places some chips too.

Fan-out

FOCoS: cheaper than a full silicon base

Instead of one big silicon interposer, FOCoS uses fine wiring layers plus small silicon bridges where chips meet, avoiding the interposer's size and cost.

Panels

Square panels instead of round wafers

A 310 x 310 mm panel line lets more large AI packages fit per run than a round 300 mm wafer, cutting waste at the edges.

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