The brief
- Shifting 20% of DRAM output to HBM3E: 8-high in 2026, 12-high by late 2026, scaling to 40,000 wpm by 2028.
- Plans 3–4M HBM3E stacks in 2027 to supply China's AI GPU demand from T-Head, Cambricon.
- Total DRAM capacity reaches 350,000 wpm by end 2026, narrowing gap with Samsung, SK Hynix, Micron.
Technical approach
High-bandwidth memory for AI
HBM3E stacks 8 or 12 DRAM dies vertically with TSVs and micro-bumps for high data rates.
DDR5, LPDDR5X volume
CXMT is the only Chinese vendor at scale in modern DRAM, competing with Samsung, SK Hynix, Micron.
Capacity scaling
New fabs under construction to scale from 320k to 420k wpm by 2027 for DRAM and HBM.

