by AMDUS
Next-gen AI accelerator for 2027. CDNA 6 on TSMC 2nm with HBM4E memory, targeting much higher performance than MI300X.
Scheduled for launch in 2027. CDNA 6 architecture on TSMC 2nm, with HBM4E memory.
Checked 10 Oct0 updates this week
CDNA 6 improves matrix multiplication throughput in AI workloads using better instruction efficiency and memory design.
HBM4E high-bandwidth memory provides higher capacity and faster data delivery than previous generations, reducing the memory bottleneck in AI workloads.
TSMC's N2P process enables denser transistors and lower power consumption compared to earlier nodes, allowing more computation per watt.
| Spec | Instinct MI500 |
|---|---|
| Manufacturing process | TSMC 2nm (N2P)R (reported) |
| Memory type | HBM4ER (reported) |
| Architecture | CDNA 6R (reported) |
R reported by the company
AMD
Instinct GPUs, Helios racks, EPYC CPUs
AMD designs CPUs and GPUs and is NVIDIA's main rival in AI chips. It pioneered building chips from smaller pieces (chiplets). Its Helios rack, backed by a 6 GW OpenAI deal, is its first full-rack AI system.
