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TheTechno Optimist.

N2 processTSMC—TSMC ArizonaTSMC—CoWoS advanced packagingTSMC—

TSMC

Chip foundry, N2, A16, CoWoS packaging

TWpublic~83,825 staffest. 1987tsmc.com (opens tsmc.com)Checked 25 Sep

The brief

Analyst view
  • N2 (2 nm class) in volume production since Q4 2025. A16 is planned for the second half of 2026.
  • Pledged $165B in total for US factories, packaging and R&D in Arizona.
  • Makes nearly all leading AI chips and packages them with CoWoS.

Technical approach

As reported
Pure-play

Foundry-only model

TSMC sells no chips of its own, so rivals trust it with their designs. Many customers fund each new node.

Transistors

Nanosheet gate-all-around

N2 swaps fin-shaped transistors for stacked silicon sheets wrapped by the gate. They leak less power.

Power

Backside power (A16)

A16 moves power wiring under the transistors, leaving the top free for signal wires.

Packaging

CoWoS and SoIC

CoWoS places processor chips and HBM memory side by side on a shared base. SoIC stacks chips directly.

Programs

TSMC, three programs

Updated 16 Jun 2026
N2 processTSMC's first node with gate-all-around transistors. Chips are faster or use less power than on N3E, and pack more transistors.ScalingNextN2P and A16 volume production · Q4 2026Updated 27 Apr 2026View program →CoWoS advanced packagingPackaging that places big processor chips and HBM memory stacks side by side on a shared base. It lets one package grow several times larger than a single chip.ScalingUpdated 16 Jun 2026View program →TSMC ArizonaTSMC's site in Phoenix, Arizona: planned 6 chip factories, 2 packaging plants and an R&D center, part of a $165B commitment.DeployNextFab 2 production (N3) · 2027Updated 18 Dec 2025View program →
Research · Proto · Pilot · Deploy · Scaling

Research & demos

3 items

Open technical problems

Open · Active · Partial
  • Rising cost per waferOpen

    Each node needs more steps and EUV exposures, so wafers cost more and savings per transistor shrink.

  • Geographic concentrationActive research

    Most advanced capacity is in Taiwan. Building abroad is slower and costlier, with worker gaps.

  • Packaging capacityActive research

    Demand for CoWoS packaging has beaten supply for years despite fast expansion.

Upcoming catalysts

Company-wide
  • 20279.5-reticle CoWoS enters volume productionCoWoS advanced packagingby ~15 mo
  • 2027Fab 2 begins N3 volume productionTSMC Arizonaby ~15 mo

Peers

Chip factories (foundries) · 1

Company & funding

Staff
~83,825as of 2024
HQ
TW
Founded
1987

Partners & customers

3 customers · 1 supplier · 1 partner

People

Key people
Primer