TSMC unveils A16 process with Super Power Rail backside power delivery

TSMC/N2 process

At its North America Technology Symposium, TSMC unveiled A16, a nanosheet process with backside power delivery scheduled for production in 2026. Moving power lines to the wafer's back frees front-side routing for signals, delivering 8–10% speed gains versus N2P at equivalent voltage.

• A16 combines TSMC nanosheet transistors with Super Power Rail backside power delivery, freeing front-side area for signal routing.
• Scheduled for 2026 production; delivers 8-10% speed gain at same voltage versus N2P, plus 15-20% power reduction at comparable speeds.
• Up to 1.10x greater chip density for data center applications versus N2P, addressing AI infrastructure scaling demands.