Xeon 6+ (Clearwater Forest) by Intel: status and timeline

Xeon 6+ (Clearwater Forest)

Pack many efficient cores into one server chip on Intel's 18A process. It is the first big test of 18A and aims to cut the power and space cloud workloads need.

DeployStage 4 of 5

First 18A server CPU launched June 2026. 288 E-core configs available. Targets cloud, telco, edge AI.

Updated 1 Jun 2026Checked 11 Oct0 updates this week

Milestones

Next · Production shipping begins

Clearwater Forest announced at ComputexJun 2026Complete.
Production shipping beginsTarget Jun 2026Current milestone.
Ericsson validation completeJun 2026Complete.

Most important updates

Intel launches Xeon 6+ (Clearwater Forest), first 18A server CPU with up to 288 E-cores1 Jun 2026

Upcoming

Jun 2026Production shipping begins (next)

Current obstacles

Yield ramp on new process18A is Intel's latest, so production yield climbs over time. Early shipments have lower output per fab run.
Competing with AMD on core countAMD's EPYC now scales to 192+ cores; Clearwater's 288-core max is the answer, but adoption takes time.

Physics limits

DDR5 bandwidth ceilingEven at 12 channels, DDR5-8000 tops ~770 GB/s aggregate. CPUs hungry for bandwidth (AI inference on uncompressed data) will throttle.
Thread scheduling complexityOS schedulers struggle to optimize for 288 cores without kernel changes. Performance on some workloads plateaus before all cores are in use.

How it works

3 parts

Efficiency cores only

No performance cores

Unlike consumer chips, Xeon 6+ uses only E-cores, optimized for throughput (many jobs) rather than single-thread speed.

18A density

More cores per die

Intel's 18A process packs smaller transistors (1.8 nm class), so more cores fit in the same footprint. 288 cores fit where 144 did before.

PowerVia

Power from the back side

PowerVia routes power through the back of the die, cutting on-die resistance and heating. Cools better at the same power.

Spec sheet

Spec	Xeon 6+ (Clearwater Forest)
Maximum E-cores	288^R (reported)
Shared L3 cache	576 MB^R (reported)
DDR5 channels	12^R (reported)
DDR5 speed	8000 MT/s^R (reported)
Default TDP	450 W^R (reported)
Low-power TDP	330 W^R (reported)
PCIe Gen5 lanes	96^R (reported)
CXL 2.0 lanes	64^R (reported)
Performance per watt (vs. prior gen)	60%+ improvement^R (reported)

^R reported by the company

Update log

1 update

Mon 1 Jun

Major: Intel launches Xeon 6+ (Clearwater Forest), first 18A server CPU with up to 288 E-coresPressHardware

About Intel

The team behind Xeon 6+ (Clearwater Forest)

Intel

PC and server CPUs, Intel Foundry, 18A, 14A

Intel, founded in 1968, invented the commercial microprocessor. After falling behind TSMC in chipmaking, it is trying to catch up with its 18A node and win outside customers for its factories. In 2025 the US government took about a 10% stake.

Panther Lake, the first 18A chip, launched in January 2026 from Fab 52 in Arizona.
US government took about 9.9% in Aug 2025. NVIDIA ($5B) and SoftBank ($2B) also invested.
Lip-Bu Tan became CEO in March 2025 and cut costs and jobs sharply.

intel.com (opens intel.com)Company profile →

Founded: 196858 yrs
Headquarters: United States
Status: Public
Listed: INTC (opens google.com)NASDAQ
Valuation: $650Bmarket capSep 2026
Staff: ~108,900Dec 2024
Raised: $7B2 rounds
Last round: Strategic investment · $5BSep 2025
Works in: ComputingChip factories (foundries)ManufacturingQuantum
Coverage: 6 programs · 22 updateslatest 11 Jul 2026checked 11 Oct
Lead investors: NVIDIAUS GovernmentSoftBank
Customers: Microsoft (opens intc.com)Amazon Web Services (opens intc.com)
Investors: US Government (opens intc.com)NVIDIA
Suppliers: ASML
People: Lip-Bu Tan (opens en.wikipedia.org)CEONaga ChandrasekaranCTO and COO, Intel Foundry

Spec

Xeon 6+ (Clearwater Forest)

Maximum E-cores

288^R (reported)

Shared L3 cache

576 MB^R (reported)

DDR5 channels

12^R (reported)

DDR5 speed

8000 MT/s^R (reported)

Default TDP

450 W^R (reported)

Low-power TDP

330 W^R (reported)

PCIe Gen5 lanes

96^R (reported)

CXL 2.0 lanes

64^R (reported)

Performance per watt (vs. prior gen)

60%+ improvement^R (reported)