FUJITSU-MONAKA: status and timeline

Milestones

Next · Global CPU and server sales begin

Broadcom ships first stacked MONAKA samplesFeb 2026Complete.
Architecture detailed at Hot Chips 202624 Aug 2026Complete.
144-core evaluation samples shipping to partnersAug 2026Complete.
Global CPU and server sales beginTarget Nov 2026Current milestone.
Server shipments start in Japan and EuropeTarget Apr 2027Not yet reached.
Volume productionTarget 2027Not yet reached.
MONAKA-X successor on 1.4nmTarget 2029Not yet reached.

Most important updates

Upcoming

Nov 2026Global CPU and server sales beginin about 3 weeks (next)
2027Volume production
Apr 2027Server shipments start in Japan and Europe
2029MONAKA-X successor on 1.4nm

Current obstacles

Unproven performance claimsThe 2x AI inference and half-the-power figures are Fujitsu's own estimates; test conditions were not disclosed and no independent benchmarks exist yet.
New stacking at volumeMONAKA is among the first chips on Broadcom's 3.5D hybrid-bonded stacking; making such stacks reliably and cheaply in volume is still ahead.
Winning buyers from AMD and IntelIt competes with EPYC and Xeon; Fujitsu must convince cloud operators and server makers that have never bought its CPUs.

Physics limits

Memory bandwidth per core144 cores share 12 DDR5 channels, about 500 GB/s in Fujitsu's own estimate, or roughly 3.5 GB/s per core. AI models that stream large weights run out of bandwidth before they run out of cores.
The power wallEvery transistor switch costs energy that becomes heat. At 350–500 W per chip, cooling, not transistor count, sets how fast all 144 cores can run at once.

How it works

4 parts

Stacking

Cores stacked on cache

Each 36-core 2nm die is bonded face to face onto a 5nm SRAM cache die with direct copper bonds, giving huge bandwidth over very short wires.

Split nodes

Costly silicon only where it pays

Only the cores use expensive 2nm silicon, under 30% of the chip's area. Cache, I/O and memory control stay on cheaper, mature 5nm.

Matrix and vector instructions

SVE2 vector units plus new 8-bit (INT8, FP8) matrix instructions let the CPU run AI inference itself, without a separate accelerator.

Security

Confidential computing

Arm CCA encrypts data in memory and walls it off even from the operating system and hypervisor, so cloud tenants can share one machine safely.

Spec sheet

Spec	FUJITSU-MONAKA
Cores	144 (4 dies × 36)^R (reported)
Process	TSMC 2nm (N2P) cores; 5nm cache and I/O^R (reported)
Peak clock	3.8 GHz^R (reported)
Memory	12-channel DDR5, up to 8,800 MT/s^R (reported)
I/O	96 lanes PCIe 6.0 / CXL 3.0^R (reported)
Instruction set	Armv9 with SVE2 vectors^R (reported)
L2 cache per core	512 KiB^R (reported)
Power (two versions)	350 W air-cooled / 500 W liquid-cooled^R (reported)
AI throughput (INT8)	69.7–96.2 TOPS (Fujitsu estimate)^E (estimated)
Double-precision matrix	4.4–6.0 TFLOPS (Fujitsu estimate)^E (estimated)

^R reported by the company · ^E our estimate

Update log

3 updates

About Fujitsu

The team behind FUJITSU-MONAKA

Fujitsu

Superconducting quantum, RIKEN collaboration, 256-1000 qubits

Fujitsu, a Japanese technology company, collaborates with Japan's RIKEN research institute to develop superconducting quantum computers. The partnership aims for practical quantum computing with scalable architectures.

Fujitsu is a major Japanese IT services and technology company publicly traded on the Tokyo Stock Exchange.
Its RIKEN collaboration has developed 64-qubit (2023) and 256-qubit (2025) superconducting systems.
The partnership plans a 1,000-qubit system for 2026 and 10,000+ qubits by 2030.

fujitsu.com (opens fujitsu.com)Company profile →

Founded: 193591 yrs
Headquarters: Japan
Status: Public
Valuation: public
Staff: ~113,000Mar 2025
Works in: QuantumSuperconductingComputingData-center CPUs
Coverage: 2 programs · 8 updateslatest 27d agochecked 11 Oct
Partners: RIKEN (opens riken.jp)Japan Ministry of Education (opens mext.go.jp)

FUJITSU-MONAKA

Milestones

Most important updates

Upcoming

Current obstacles

Physics limits

How it works

Cores stacked on cache

Costly silicon only where it pays

Matrix and vector instructions

Confidential computing

Spec sheet

Update log

Mon 14 Sep

Mon 24 Aug

Thu 26 Feb

About Fujitsu

Current obstacles

Physics limits

How it works

Cores stacked on cache

Costly silicon only where it pays

Matrix and vector instructions

Confidential computing

Spec sheet

Update log

Mon 14 Sep

Mon 24 Aug

Thu 26 Feb

About Fujitsu