HBM4 by Micron Technology: status and timeline

HBM4

HBM4 is Micron's stacked memory for AI accelerators, delivering 2.8 TB/s per stack. Volume shipments began in March 2026 for NVIDIA Vera Rubin and other hyperscaler platforms.

DeployStage 4 of 5

In production since March 2026; 18% market share in Q2; targeting 20% by year-end.

Updated Q2 2026Checked 10 Oct0 updates this week

Milestones

Next · Reach 20% market share

HBM3E mass production beginsFeb 2024Complete.
HBM4 development complete2025Complete.
HBM4 volume shipments (NVIDIA Vera Rubin)Mar 2026Complete.
$1 billion HBM4 revenue milestoneJul 2026Complete.
Reach 20% market shareTarget Dec 2026Current milestone.
Expand to 15,000 wafers/monthTarget 2027Not yet reached.

Most important updates

Upcoming

Q4 2026Vera Rubin GPU production ramp (next)
Dec 2026Reach 20% market share
2027Expand to 15,000 wafers/month
2027HBM4 adoption by additional hyperscalers

Current obstacles

Yield on stackingHBM stacking is complex; defect densities in the TSV and assembly steps must fall as volume rises to meet cost targets.
Competing with established suppliersSK Hynix and Samsung have years of HBM production and deep customer relationships. Micron must prove long-term supply reliability.

Physics limits

Power density ceilingEach HBM stack dissipates ~20W. GPUs cannot handle more thermal density; adding speed or capacity per die means more heat.
Stacking height limitsHBM4 uses 12 layers. Going taller requires better thermal management, which raises cost and complexity.
Manufacturing precisionMicro-bumps must align to micron tolerances. Process drift causes yield loss; this makes manufacturing the key cost and quality lever.

How it works

3 parts

Stacked Die

Vertical stacking increases density

HBM4 stacks multiple DRAM dies vertically with micro-bumps connecting them. This reduces data travel distance and raises bandwidth while keeping power low.

Through-Silicon Vias

TSVs enable all-layer bandwidth

Millions of vertical channels pass through silicon, connecting all stacked layers. This lets all dice communicate simultaneously, multiplying total bandwidth.

Thermal Limits

Power budget sets design ceiling

HBM4 is designed for ~20W per chip. GPU memory subsystems cannot dissipate more; additional layers or speed means more total heat.

Spec sheet

Spec	HBM4
Memory bandwidth (per stack)	2.8 TB/s^R (reported)
HBM market share (Q2 2026)	18%^R (reported)
Target market share (year-end 2026)	~20%^R (reported)
HBM4 revenue (4 months, Feb-Jun 2026)	$1 billion^R (reported)
Target capacity (end 2026)	15,000 wafers/month^R (reported)

^R reported by the company

Update log

2 updates

Q2 2026

Minor: Micron holds 18% HBM market share; SK Hynix leads at 50%, Samsung at 33%BlogOther

Mar 2026

Major: Micron begins HBM4 volume shipments to NVIDIA Vera Rubin platformPressHardware

About Micron Technology

The team behind HBM4

Micron Technology

HBM4, AI memory, DRAM

Micron designs and manufactures memory and storage for AI data centers, PCs and mobile devices. Founded in Boise, Idaho, it is the third-largest DRAM maker and the only US HBM supplier. In 2026, it ramped HBM4 to 18% market share.

Micron began shipping HBM4 in March 2026 for NVIDIA Vera Rubin, hitting $1B sales in 4 months.
In Q2 2026, Micron held 18% HBM market share; it aims for 20% by year-end.
The company signed 16 strategic customer agreements with hyperscalers for long-term HBM supply.

micron.com (opens micron.com)Company profile →

Founded: 197848 yrs
Headquarters: United States
Status: Public
Valuation: public
Staff: ~53,000Jan 2025
Works in: ComputingPackaging & memory
Coverage: 1 program · 3 updateslatest 1 Jun 2026checked 10 Oct
Customers: NVIDIA (opens nvidia.com)Google Cloud (opens cloud.google.com)
People: Sanjay Mehrotra (opens investors.micron.com)CEO and Chairman

Spec

HBM4

Memory bandwidth (per stack)

2.8 TB/s^R (reported)

HBM market share (Q2 2026)

18%^R (reported)

Target market share (year-end 2026)

~20%^R (reported)

HBM4 revenue (4 months, Feb-Jun 2026)

$1 billion^R (reported)

Target capacity (end 2026)

15,000 wafers/month^R (reported)