Europa AIPU by Axelera AI: status and timeline

Europa AIPU

Run modern AI models, including language models, on devices and local servers at a fraction of a GPU's power and cost, so robots, cameras and factories can use AI without sending data to a cloud.

DeployStage 4 of 5

Shipping as of Sep 2026, validated in Dell and Supermicro systems; Titania data-centre chiplet due 2027-28.

Updated 24d agoChecked 11 Oct0 updates this week

Milestones

Next · Titania data-centre chiplet

Metis announced: 214 TOPS at 15 TOPS/W15 Dec 2022Complete.
Up to €61.6M EuroHPC grant for Titania chiplet6 Mar 2025Complete.
Europa architecture unveiled (629 TOPS)Oct 2025Complete.
$250M+ Series CFeb 2026Complete.
Europa products shipping; Dell, Supermicro systemsSep 2026Complete.
Titania data-centre chipletTarget 2028Current milestone.

Most important updates

Upcoming

2028Titania data-centre chiplet (next)

Current obstacles

Model supportEach new model family must be compiled and tuned for Axelera's chips before customers can switch from NVIDIA Jetson-class parts.
Customers train elsewhereCustomers train on NVIDIA and run inference on Axelera, so each deployment means moving models between two toolchains.

Physics limits

SRAM is smallIn-memory compute uses SRAM, which stores far fewer bits per area than DRAM. Large language models spill into slower external memory, where bandwidth sets the speed.
Low precision has a costPeak figures assume 8-bit integers. Models need careful quantisation to keep accuracy, and some layers still need higher precision at lower speed.

How it works

4 parts

Bottleneck

Moving weights costs the energy

Running a neural network is mostly multiply-and-add on stored weights; fetching those weights from memory burns more energy than the maths.

In-memory

Compute where weights sit

Each AI core does the multiplications inside SRAM arrays holding the weights, digitally, so it keeps exact results without retraining.

Helpers

RISC-V cores and video decode

Sixteen RISC-V vector cores handle the other steps, and a built-in video decoder takes several 4K camera streams straight in.

Scale

One to four chips per card

PCIe cards carry up to four Europa chips and 256 GB of memory, enough for larger language models in a server.

Spec sheet

vs Metis AIPU

Spec	Europa AIPU	Metis AIPU	Change
Peak compute (INT8)	629 TOPS^R (reported)	214 TOPS (Metis)	▲ 415 TOPS
AI cores	8 second-gen D-IMC cores^R (reported)	4 (Metis)	▲ 4
RISC-V vector cores	16 (4,915 GOPS)^R (reported)	—	—no comparable change
On-chip L2 SRAM	128 MB^R (reported)	52 MiB (Metis)	—no comparable change
Memory bandwidth	200 GB/s (256-bit LPDDR5)^R (reported)	—	—no comparable change
PCIe card memory	16 GB (1 chip) to 256 GB (4 chips)^R (reported)	—	—no comparable change
Customers	More than 600^R (reported)	—	—no comparable change

^R reported by the company

Update log

5 updates

About Axelera AI

The team behind Europa AIPU

Axelera AI

Edge AI inference chips, in-memory compute, RISC-V

Axelera AI is an Eindhoven startup making low-power chips that run AI models inside cameras, robots, drones and servers rather than in a distant data centre. Its 2026 round was the largest ever for an EU AI chip company.

Raised $250M+ Series C in Feb 2026 led by Innovation Industries; over $450M raised in total.
Europa chip (629 TOPS) shipping since Sep 2026 in Dell and Supermicro systems; 600+ customers.
Titania data-centre chiplet, backed by up to €61.6M from EuroHPC, targeted for 2027-2028.

axelera.ai (opens axelera.ai)Company profile →

Founded: 20215 yrs
Headquarters: Netherlands
Status: Private
Valuation: private
Raised: $250M1 round
Last round: Series C · $250MFeb 2026
Works in: ComputingInference chipsRobotics
Coverage: 1 program · 5 updateslatest 24d agochecked 11 Oct
Lead investors: Innovation Industries
Partners: EuroHPC Joint Undertaking (opens dutchnews.nl)Dell (opens ioplus.nl)
Investors: Samsung Catalyst Fund (opens ioplus.nl)BlackRock (opens osborneclarke.com)
People: Fabrizio Del Maffeo (opens dutchnews.nl)Co-founder & CEOEvangelos Eleftheriou (opens sdxcentral.com)Co-founder & CTO

Spec

Europa AIPU

Metis AIPU

Change

Peak compute (INT8)

629 TOPS^R (reported)

214 TOPS (Metis)

▲ 415 TOPS

AI cores

8 second-gen D-IMC cores^R (reported)

4 (Metis)

▲ 4

RISC-V vector cores

16 (4,915 GOPS)^R (reported)

—

—no comparable change

On-chip L2 SRAM

128 MB^R (reported)

52 MiB (Metis)

—no comparable change

Memory bandwidth

200 GB/s (256-bit LPDDR5)^R (reported)

—

—no comparable change

PCIe card memory

16 GB (1 chip) to 256 GB (4 chips)^R (reported)

—

—no comparable change

Customers

More than 600^R (reported)

—

—no comparable change

Europa AIPU

Milestones

Most important updates

Upcoming

Current obstacles

Physics limits

How it works

Moving weights costs the energy

Compute where weights sit

RISC-V cores and video decode

One to four chips per card

Spec sheet

Update log

Thu 17 Sep

Feb 2026

Fri 24 Oct 2025

Thu 6 Mar 2025

Thu 15 Dec 2022

About Axelera AI

Current obstacles

Physics limits

How it works

Moving weights costs the energy

Compute where weights sit

RISC-V cores and video decode

One to four chips per card

Spec sheet

Update log

Thu 17 Sep

Feb 2026

Fri 24 Oct 2025

Thu 6 Mar 2025

Thu 15 Dec 2022

About Axelera AI