SN50 / RDU accelerator by SambaNova: status and timeline

Milestones

Next · SN50 production ramp and customer deployments

Stanford research on dataflow computing2017Complete.
SambaNova founded by Stanford professors and former Oracle exec2017Complete.
Series E funding led by IntelFeb 2026Complete.
SN50 chip introduced and began shipping to customersFeb 2026Complete.
Intel antitrust clearance for Series E investment1 May 2026Complete.
Series F $1B funding at $11B valuationJul 2026Complete.

Upcoming

2026SN50 production ramp and customer deployments (next)
2026SambaCloud expands model and customer base

Current obstacles

Proving performance and cost advantageSambaNova must demonstrate that its dataflow approach generates tokens cheaper than GPUs in real production workloads. No third-party benchmarks yet.
SambaFlow software maturityDevelopers must learn a new framework and rewrite models for SambaFlow. CUDA has decades of maturity and a vast library of optimized kernels.
Supply chain and fab capacityCustom silicon requires fab access and a tight supply chain. Manufacturing at scale requires discipline and partnerships with foundries.

Physics limits

Memory bandwidth is still the limitEven with on-chip SRAM, generating tokens requires feeding data through the memory hierarchy. Physics limits bandwidth per silicon area.
Dataflow efficiency depends on model architectureSome models map cleanly to dataflow graphs; others have irregular control flow or dynamic shapes that are harder to optimize.

How it works

3 parts

Model as a graph

Operations flow sequentially

The RDU treats an AI model as a graph where data flows from operation to operation, like an assembly line. Intermediate results stay on-chip in PMU memory.

Local memory hierarchy

PCU compute, PMU storage

PCUs do arithmetic; PMUs hold activations. Keeping data local avoids costly off-chip DRAM and HBM trips.

Scaling

Multi-RDU systems with SambaFlow

SambaFlow manages distribution across RDUs automatically. Developers write for one RDU; SambaFlow scales to 256.

Spec sheet

Spec	SN50 / RDU accelerator
Max RDUs per system	256^R (reported)
Llama 4 Maverick throughput	655 tokens/sec^R (reported)
Llama 3.1 405B throughput	132 tokens/sec^R (reported)
Llama 3.1 70B throughput	461 tokens/sec^R (reported)

^R reported by the company

About SambaNova

The team behind SN50 / RDU accelerator

SambaNova

Dataflow architecture, RDU, AI accelerators, SambaCloud

SambaNova designs purpose-built AI inference accelerators using a dataflow architecture and Reconfigurable Dataflow Unit (RDU). Founded in 2017 by Stanford professors and former Oracle executive Rodrigo Liang, the company is backed by Intel and other investors.

Raised $1B Series F at $11B valuation in July 2026; Series E ($350M, Vista-led) in February 2026 with Intel co-investing $35M.
RDU approaches inference as graphs where data streams through operations like assembly lines, not GPUs.
Intel cleared antitrust in May 2026. SN50 announced Feb 2026, shipping later; SambaCloud runs Llama 4 Maverick at 655 tokens/sec.

sambanova.ai (opens sambanova.ai)Company profile →

Founded: 20179 yrs
Headquarters: United States
Status: Private
Valuation: $11BprivateJul 2026
Raised: $2B3 rounds
Last round: Series F · $1BJul 2026$11B post
Works in: ComputingAI accelerators & CPUs
Coverage: 1 program · 5 updateslatest 1 Jul 2026checked 10 Oct
Lead investors: Vista Equity PartnersCambium Capital
Customers: Meta (opens sambanova.ai)
Investors: Intel (opens verdict.co.uk)
People: Rodrigo Liang (opens greatentrepreneurs.podbean.com)Founder & CEOKunle Olukotun (opens cs.stanford.edu)Co-founderChristopher Ré (opens cs.stanford.edu)Co-founder

Spec

SN50 / RDU accelerator

Max RDUs per system

256^R (reported)

Llama 4 Maverick throughput

655 tokens/sec^R (reported)

Llama 3.1 405B throughput

132 tokens/sec^R (reported)

Llama 3.1 70B throughput

461 tokens/sec^R (reported)